A high speed digital interface circuit typically has two independent devices, called a “source” device and a “sink” device, that communicate with each other across a bus having multiple data signal lines or channels. Individual data bits forming a digital data signal, when transmitted along the bus, take a different amount of time to reach the other end. The time difference between the “fastest” bit and the “slowest” bit is the bus's maximum delay skew. Excessive skew is problematic because it results in timing problems for signals intended for virtually simultaneous arrival.
Data rates of 2.5 Gb/s and higher are used between the source and the sink devices in high-speed optical interfaces. Since skew is a significant problem in a high-speed optical interface, a special skew correction circuit is often implemented in the sink device in order to compensate. Currently available technologies, which are capable of processing data at a speed up to 40 Gb/s, do not allow complex circuits (or multiplexing devices) to be constructed, thereby limiting the types of circuits that can be used to compensate for skew. In some instances, the source device and the sink device are implemented in different technologies, further limiting the opportunities for skew correction. The sink device can even be implemented in a technology that does not allow high complexity, even further limiting the circuits that can be used to compensate for skew.